Ms. Swapna Srinivasan
Educational Qualification
B.E – Electronics and Communication Engineering
M.S- VLSI-CAD
Experience
13.2 Years(Teaching) + 1 Years (Industry)
Area of Interest
- VLSI
- Nano-Electronics
Professional Membership
- IEEE Member since 5 years: 92571197
- Life Member of ISTE: LM 117757
Subject Handled
- VLSI DESIGN
- VERILOG HDL
- DIGITAL SYSTEM DESIGN USING VERILOG
- DIGITAL ELECTRONICS
- BASIC ELECTRONICS
Workshops / FDPs / SDPs / STTPs Attended/Conducted
19
Conference / Journal Publications
International Journals
- BavusahebKunchanur,Mrs.SwapnaSrinivasan,“Design and Analysis of Full Adder Using Different Low Power Techniques” has been published online successfully in the Volume 4, Issue 1 of the American Journal of Computer Science and Information Technology
- Bavusahebkunchanur,Mrs.SwapnaSrinivasan,“Design and Analysis of Carry select adder using modified full swing GDI techniques”has been published in International Journal for Research in Applied Science and Engineering TechnologyVolume 2,Issue 5,May 2016.ISSN 2321-9653
- Padmaja, Swapna Srinivasan,Sheetal Bhongle .”Flipped Classroom : An effective ICT tool for Facilitators and Remote location Learners” has been published in Journal of Engineering Education Transformations,Volume 33,January 2020, Special issue eISSN 2394-1707
International Conferences
- PrabhavatiKesari and Mrs.SwapnaSrinivasan“Real time Monitoring System for a Automobiles using lab view tool” in 2nd International conference on recent trends in Signal processing, Image processing & VLSI organized by Don Bosco Institute of Technology on 15th & 16th May 2015
- Madhu HS and Mrs.SwapnaSrinivasan,“Area and Power Optimization of Single Phase flexible multiband clock distribution in 2nd International conference on recent trends in Signal processing, Image processing & VLSI organized by Don Bosco Institute of Technology on 15th& 16th May 2015