
Mr. Uday J
Educational Qualification
B.E-Electronics and Communication Engineering
M.Tech-Digital Electronics and Communication System
Ph. D – (Pursuing)
Experience
10 Years(Teaching) +1 year (Industry)
Area of Interest
Digital Circuit Design, Image Processing
Professional Membership
IEEE: 98482861
ISTE: LM131668
Orcid ID: 0000-0001-7971-1486
Publons ID: ABC-2101-2021
Scopus ID: 57204482618
Google Scholar ID: FjVK2joAAAAJ&hl
Vidwan ID: 251554
Subject Handled
- HDL
- DSP
- DSDV
- Basic Electronics
- Satellite Communication
- Wireless Communication
- Electronic Instrumentation
- Image Processing
- Network Analysis
- Signals and Systems
Research Book:
- Dr. Mohana H S, Rajith Kumar B K, Uday J, “Pattern Recognition Technique for Kannada Script Analysis” (Research Book) – Lambert Academic Publication, 2020 (ISBN: 978-620-2-55300-1)
Number of Workshops / FDPs / SDPs / STTPs Attended/Conducted : 15
- FDP on “Nanosensors & Devices”, Organized by National Institute of Technical Teachers Training & Research, Chandigarh (NITTTR) (22/08/2022 to 26/08/2022)
- Online FDP on “Photonics”, organized by NITK, Surthkal,(1/2/2021 to 5/2/2021)
- Online FDP on “Principles of Modern RADAR”, organized by Department of EC, RISE Krishna Sai Prakasam group of Institutions.(3/6/2020 to 7/6/2020)
- Online FDP on “Various Research Opportunities in Electronics and Communication Engineering”, organized by Department of EC, RISE Krishna Sai Prakasam group of Institutions.(1/7/2020 to 3/7/2020)
- Online FDP on “Applications of Image Processing”, organized by Department of IT, SJEC Chennai in association with NCCR, Ministry of Earth Science, GOI, (14/7/2020 to 18/7/2020)
- Online FDP on “Insights on writing research proposal and funding opportunities”, organized by SJEC, Mangaluru (20/7/2020 to 24/7/2020)
- FDP, on “An overview of Teaching Techniques in Engineering Statistics and Linear Algebra”, organized by VTU HRDC, centre of pg studies, Muddenahalli , Chikkaballapur
- FDP on “Recent Trends in Medical Image Processing Using Wavelet Transform”, from 1-5th January 2019, at SJEC Mangaluru
- Workshop on “Course Design and Management”, on 16th –18th July, 2018 at SJEC, Mangaluru
- Workshop on “Embedded Systems for Communication Applications”, on 19th – 23rd June, 2018 at NMAMIT, Nitte
- Workshop on “Fundamentals in Sampling Theory”, on 17th March, 2018, at SJEC, Mangaluru
- Workshop on “ARM Controller and its Application”, organised by BITES on 4-5 DEC,2015 at SIT Mangaluru
- VTU-VGST FDP on “PCB Process Automation” from 24-27 June, 2015 at PESIT, Shivmoga
- Workshop on “Neural Networks” on 18th Dec, 2014 at SIT Mangaluru
- ISTE workshop on “Control System”, conducted by IIT Kharagpur, from 2-12 Dec 2014 at SIT, Mangaluru
Conference / Journal Publications :
- Uday J et.al, “Next-Gen Health Monitoring : Enhancing Prenatal and Thyroid Health outcome”, IJCRT, Vol.12, Issue 8, Aug 2024.
- Uday J et.al, “ A review on Hydroponic Monitoring System”, IJRET, Vol.11, issue 8, Aug 2024
- Uday J et.al , “A review on Automated Medical Diagnosis”, IJSREM, Vol 8, Issue 06, June 2024
- Uday J et.al, E-Patha – A Hyperlocal weather monitoring Application Using Django framework, IJARCCE, Vol.11, Isuue5, May 2022
- Uday J et.al, E-Patha – A Hyperlocal weather monitoring Application Using Django framework, IJERT, Vol.10, Isuue 11, May 2022
- Uday J et.al, “ A Review on LoRa Transmission”, IJERT, Vol. 10, Issue 11, 2022
- Uday J et.al, “Geofensing Technology for Sustaining Vehicular Noise Pollution in Urban Areas”, IEEE 1011, ISBN: 978-7381-4637-91/21,2022
- Uday J et.al. Uday J et al, “Drainage Overflow Detection”, IRJET, Vol 7, June 2020
- Uday J et al, “A Novel Architecture of 32-bit Modulo 2n-1 Adder”, IJAST, 2020
- Uday J et al, “Implementation of 16 bit Hybrid modulo 2n-1 Adder”, IJERT, Vol 6, Issue 15,2018.
- Uday J. et al “Edge Detection of Degraded Stone Inscription Kannada Character”, in Proceedings of IC3T-2016, Springer-AISC Series, Vol 542, pp 11-20, ISSN 2194-5357, 2017.
- Uday J. et al, “Read and recognition of old Kannada stone inscriptions characters using novel algorithm”, IEEE 2016, ISBN-978-1-4673-9825-2/15/$31.00 (2016).
- Uday J, G H Asha, “Implementation 32-bit Area Efficient Hybrid Modulo 2n+1 Adder and Multiplier”, IEEE 2014, ISBN-978-1-4799-4190-2/14/$31.00 (2014).
- Uday J, G H Asha, “Implementation of Modulo 2n+1 Adder and Multiplier”, IJECT, 5, Issue 2, April-June 2014.
Achievements
- Project titled ‘Medical Bed With Integrated Toilet System’under taken by students Mr. Santhosh Shrirahatti, Mr Pavan L, Mr. Praneeth, Mr. Hrithik Mukkoth under the guidance of Mr. Uday J, Awarded with Best Project of the Year & received funding of worth Rs.6000/- from KSCST 46thSeries of Student Project Programme and also Secure first place with cash prize if Rs. 6000/- in 18th Karnataka State Level ISTE Student Convention.